research groups

Formal Modelling and Analysis of Embedded Systems

Focus:	Formal modeling, analysis, and verification of real-time and embedded systems
Leader:	Paul Pettersson
Members:	Paul Pettersson, Cristina Seceleanu, Jagadish Suryadevara, Stefan Björnander, Aida Causevic, Leo Hatvani, Raluca Marinescu Former: Eun-Young Kang
Division:	Division of Embedded Systems
Funding:	SSF, VR, EU and MdH.

Verifying MARTE/CCSL Mode Behaviors using UPPAAL, Jagadish Suryadevara, Cristina Seceleanu, Frederic Mallet (Univ. of Nice & INRIA, Sophia-Antipolis), Paul Pettersson, 11th International Conference on Software Engineering and Formal Methods (SEFM), Madrid, SPAIN, September, 2013

Validating EAST-ADL Timing Constraints using UPPAAL, Jagadish Suryadevara, 39th Euromicro Conference on Software Engineering and Advanced Applications (SEAA), Spain, September, 2013

Analysis Support for TADL2 Timing Constraints on EAST-ADL Models, Arda Goknil (INRIA, France), Jagadish Suryadevara, Marie-Agnes Peraldi-Frati (Univ. of Nice & INRIA, Sophia-Antipolis), Frederic Mallet (Univ. of Nice & INRIA, Sophia-Antipolis), 7th European Conference on Software Architecture (ECSA), Montpellier, France, July, 2013