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Jagadish Suryadevara   
Jagadish Suryadevara, PhD student

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Room:U1-174
Phone:021- 10 31 16
Research group:Formal Modelling and Analysis of Embedded Systems
PhD supervisor:Paul Pettersson
Web:Official university homepage

Research    Publications    Projects    MSc theses   

Research interests  [ Show full biography ]

Jagadish Suryadevara has previously worked in the research area of UML specification of concurrent, reactive systems at Tata Institute of Fundamental Research (TIFR), India. His general research interests include UML, formal specification and verification, software architectures, and real-time systems.

 

Latest publications [ Show all publications ]


Analysis Support for TADL2 Timing Constraints on EAST-ADL Models, Arda Goknil (INRIA, France), Jagadish Suryadevara, Marie-Agnes Peraldi-Frati (Univ. of Nice & INRIA, Sophia-Antipolis), Frederic Mallet (Univ. of Nice & INRIA, Sophia-Antipolis), 7th European Conference on Software Architecture (ECSA), Montpellier, France, July, 2013

Timed Automata Modeling of CCSL Constraints, Jagadish Suryadevara, Ling Yin (East China Normal University, Shanghai, China), First International Workshop on Formal Techniques for Safety-Critical Systems, Kyoto, JAPAN, November, 2012

Design and Analysis Support for Abstract Models of Component-based Embedded Systems, Jagadish Suryadevara, Licentiate Thesis, Mälardalen University Press, June, 2011
 

Research projects

 


Supervised BSc and MSc theses

 
Research    Publications    Projects    MSc theses   
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