W.G. 1

Title: Timing Models For Multi-Cores And Timing Composability

Working Group 1 Leader: 

Prof. Christine ROCHANGE

Telephone: , Fax:
e-mail: rochange <at> irit.fr 

Description: Recent advances in computer architecture, in particular the arrival of multi-core/manycore processors where hardware resources are shared between processor cores, have introduced major new challenges in timing analysis. On such processors, activities on one core can affect the timing of activities on other cores. It is no longer possible to consider execution times independently for each core: rather, timing analysis must take all possible simultaneous activities into account. These processor architectures thus lack timing composability, i.e., the ability to infer the timing for the full system from the timing of its isolated parts. This affects very adversely the timing predictability of these systems. The problem is aggravated by increasingly complex software.

A tight interaction between hardware/software designers and timing analysis experts is required to face this new challenge. A key objective for this Working Group is to bring these two communities together, thus increasing the potential for innovation.

This Working Group will take a two-pronged approach to the timing analysis problem. First, the Working Group will work towards hardware designs controlling how threads in multi-cores interact. If successful, this will allow threads to be analysed in isolation, significantly reducing the cost for verification. The focus will be on shared hardware within multi-cores, as this is the main source of time unpredictability and reduced time composability:

  • on-chip memory (e.g. cache) contention;
  • interconnection networks (bus, network on chip);
  • off-chip resources such as external memory.

Second, the Working Group will define analysis methods for current real-time multi-core architectures. A major goal is to understand the current generation of real-time multi-core processors. Different research groups will work together to analyse the latest actual real-time multicore processors, in order to identify causes of execution time variability. New innovations in analysis techniques are needed to cope with this complexity. The Working Group will also study how system and application software design influences analysability.

The Working Group will:

  • define new hardware mechanisms for multi-core platforms that provide both temporal predictability and composability;
  • study the predictability of current multi-cores and define new analysis methods.